20-Gb/s 60-GHz OOK Receiver for High-Data-Rate Short-Range Wireless Communications

Abstract

This paper presents a high data-rate, low-power and highly sensitive 60-GHz on-off-keying (OOK) receiver. The circuit is implemented in a 130-nm SiGe BiCMOS technology and occupies a total chip area of 0.82 mm2. The receiver consists of a low noise amplifier (LNA), an OOK demodulator and an output buffer. For robust operation, a dc offset cancellation technique is implemented. The receiver sensitivity is −41 dBm, while consuming 44 mW of dc power including the output buffer. Thanks to its wideband-characteristic, the circuit demonstrates, to the authors best knowledge, the highest data rate (DR) of 20 Gb/s among the already published V-band OOK receivers. This corresponds to an energy efficiency of 2.2 pJ/bit.