An F-Band Power Amplifier with Skip-Layer Via Achieving 23.8% PAE in FinFET Technology

Q. Yu, Jeffrey Garrett, Seahee Hwangbo, G. Dogiamis, S. Rami
{"title":"An F-Band Power Amplifier with Skip-Layer Via Achieving 23.8% PAE in FinFET Technology","authors":"Q. Yu, Jeffrey Garrett, Seahee Hwangbo, G. Dogiamis, S. Rami","doi":"10.1109/RFIC54546.2022.9863118","DOIUrl":null,"url":null,"abstract":"This paper presents an F-band power amplifier (PA) designed using novel back-end-of-line (BEOL) in Intel 16 technology. In the PA transistor array, skip-layer vias which directly connect transistor to thick metal layers are used to reduce parasitics from BEOL and improve the PA performance. This 2-stage PA shows excellent peak PAE and gain per stage. At 110GHz, the measured $\\mathrm{P}_{\\text{sat}}$, peak PAE, linear power gain, and OP1dB are 11.8dBm, 23.8%, 17.1dB, and 9.2dBm, respectively. The core area of the PA is 0.023mm2, enabling compact integration into phased array or waveguide based transceivers. To the authors' knowledge, this is the first circuit demonstration using skip-layer via that operates beyond 100GHz.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863118","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

This paper presents an F-band power amplifier (PA) designed using novel back-end-of-line (BEOL) in Intel 16 technology. In the PA transistor array, skip-layer vias which directly connect transistor to thick metal layers are used to reduce parasitics from BEOL and improve the PA performance. This 2-stage PA shows excellent peak PAE and gain per stage. At 110GHz, the measured $\mathrm{P}_{\text{sat}}$, peak PAE, linear power gain, and OP1dB are 11.8dBm, 23.8%, 17.1dB, and 9.2dBm, respectively. The core area of the PA is 0.023mm2, enabling compact integration into phased array or waveguide based transceivers. To the authors' knowledge, this is the first circuit demonstration using skip-layer via that operates beyond 100GHz.
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在FinFET技术中实现23.8% PAE的跨层f波段功率放大器
本文介绍了一种采用Intel 16技术的新型后端线(BEOL)设计的f波段功率放大器。在PA晶体管阵列中,采用直接将晶体管与厚金属层连接的跳层通孔来减少BEOL的寄生,提高PA性能。这款2级扩音器显示出优异的峰值PAE和每级增益。在110GHz时,测量到的mathrm{P}_{\text{sat}}$、峰值PAE、线性功率增益和OP1dB分别为11.8dBm、23.8%、17.1dB和9.2dBm。PA的核心面积为0.023mm2,可紧凑集成到相控阵或基于波导的收发器中。据作者所知,这是第一个使用工作频率超过100GHz的跳层通道的电路演示。
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