Wenxuan Sun, Woyu Zhang, Jie Yu, Yi Li, Zeyu Guo, Jinru Lai, Danian Dong, Xu Zheng, Fei Wang, Shaoyang Fan, Xiaoxin Xu, Dashan Shang, Meilin Liu
{"title":"3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm2) Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing","authors":"Wenxuan Sun, Woyu Zhang, Jie Yu, Yi Li, Zeyu Guo, Jinru Lai, Danian Dong, Xu Zheng, Fei Wang, Shaoyang Fan, Xiaoxin Xu, Dashan Shang, Meilin Liu","doi":"10.1109/vlsitechnologyandcir46769.2022.9830310","DOIUrl":null,"url":null,"abstract":"In this work, we realized a three-dimensional (3D) reservoir computing (RC) by utilizing the I-V nonlinearity and short-term memory of the dynamic memristor in 4-layer vertical array. The cycle-to-cycle variation of the dynamic reservoir is improved by parallel memristor configuration. The dimensionality of the reservoir space is increased by input strategy design. After the hardware-software co-optimization, the proposed 3D RC system exhibits high recognition accuracy (90%), low energy consumption (~0.78 pJ /operation), and high area efficiency (5.12 TOPS/mm2).","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830310","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
In this work, we realized a three-dimensional (3D) reservoir computing (RC) by utilizing the I-V nonlinearity and short-term memory of the dynamic memristor in 4-layer vertical array. The cycle-to-cycle variation of the dynamic reservoir is improved by parallel memristor configuration. The dimensionality of the reservoir space is increased by input strategy design. After the hardware-software co-optimization, the proposed 3D RC system exhibits high recognition accuracy (90%), low energy consumption (~0.78 pJ /operation), and high area efficiency (5.12 TOPS/mm2).