FPGA Hardware Implementation of Computationally Efficient DOA Estimation of Coherent Signals

Ahmed A. Hussain, N. Tayem, A. Soliman
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引用次数: 1

Abstract

Direction of Arrival (DOA) estimation of highly correlated or coherent signals involve some preprocessing steps to de-correlate the signals before DOA estimates are computed. This increases the computational complexity of the estimation algorithms further, rendering hardware implementation a challenging task. In this paper, we present the hardware implementation of a novel and computationally efficient DOA estimation algorithm for coherent sources based on applying forward/backward averaging to the signal space matrix to deal with the incident coherent signals. The proposed algorithm has been implemented on a Virtex-5 FPGA using LabVIEW FPGA modules. Simulations results as well as FPGA resource utilization and computation speed are presented to validate the efficacy of the proposed method and the efficiency of hardware implementation.
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相干信号的高效DOA估计的FPGA硬件实现
高度相关或相干信号的到达方向(DOA)估计需要在计算DOA估计之前进行一些预处理步骤来去除信号的相关。这进一步增加了估计算法的计算复杂性,使硬件实现成为一项具有挑战性的任务。在本文中,我们提出了一种新的、计算效率高的相干源DOA估计算法的硬件实现,该算法基于对信号空间矩阵应用前向/后向平均来处理入射相干信号。该算法已在Virtex-5 FPGA上使用LabVIEW FPGA模块实现。仿真结果以及FPGA资源利用率和计算速度验证了所提方法的有效性和硬件实现的效率。
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