System Margin Improvement with Multiphase Equalization for High-Speed Links

Abstract

Signal integrity issues such as inter-symbol interference (ISI) limit the maximum data rates achievable on off-chip interconnect. Sophisticated equalization techniques must be used to mitigate the impact of ISI in order to achieve multi-gigahertz data rates. Conventional methods minimize ISI either at the data sampling time (Stojanovic, 2006) for better signal to interference ratio (SIR) or at the edge sampling time (Brunn, 2005) for smaller data-dependent deterministic jitter (DDJ). However, common in high-speed I/O specifications is the received eye mask which specifies the minimum received opening of a data eye both in voltage and time. This paper presents multiphase equalization that effectively trades off voltage and timing margin for a given eye mask specification. We use the statistical link performance analysis framework in (Oh, 2007) to show the effectiveness and flexibility of the methods in controlling eye shape and trading off timing and voltage margins. Regression data over 13 backplane channels show that compared with traditional ZFE methods, multiphase equalization provide better overall link performance.