J. Moon, K. Wang, R. Rajavel, S. Bui, D. Wong, D. Chow, J. Jenson
{"title":"Planar tunneling-coupled field-effect transistor for low-power mixed-signal applications","authors":"J. Moon, K. Wang, R. Rajavel, S. Bui, D. Wong, D. Chow, J. Jenson","doi":"10.1109/DRC.2005.1553148","DOIUrl":null,"url":null,"abstract":"In this paper, we report a prototype demonstration of room-temperature resonant tunneling-coupled transistors in FET layout (TCT), in which tunneling characteristics such as negative differential resistance (NDR) and peak current are directly controlled by surface Schottky gate with high gain and transconductance. Functionality of the device can also be switched between FET mode and tunneling transistor mode. The fabrication process is fully compatible with conventional FET processes, offering a fully integrable and scalable tunneling transistor technology. Prototype planar TCTs were fabricated with resonantly-coupled dual-channel InAlAs/InGaAs/InP HEMT heterostructures by providing independent electrical contacts to each channel. The current-voltage characteristics are determined by an interwell and intersubband tunneling. The fabrication process was done using an I-line Cannon stepper on full 3-inch wafers with implanted back-gates defined prior to MBE growth of closely-coupled dual-channel HEMT layers. The highest mobility of the closely-coupled dual-channel HEMT layers observed so far is 9600 cmWs at room temperature","PeriodicalId":306160,"journal":{"name":"63rd Device Research Conference Digest, 2005. DRC '05.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"63rd Device Research Conference Digest, 2005. DRC '05.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2005.1553148","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we report a prototype demonstration of room-temperature resonant tunneling-coupled transistors in FET layout (TCT), in which tunneling characteristics such as negative differential resistance (NDR) and peak current are directly controlled by surface Schottky gate with high gain and transconductance. Functionality of the device can also be switched between FET mode and tunneling transistor mode. The fabrication process is fully compatible with conventional FET processes, offering a fully integrable and scalable tunneling transistor technology. Prototype planar TCTs were fabricated with resonantly-coupled dual-channel InAlAs/InGaAs/InP HEMT heterostructures by providing independent electrical contacts to each channel. The current-voltage characteristics are determined by an interwell and intersubband tunneling. The fabrication process was done using an I-line Cannon stepper on full 3-inch wafers with implanted back-gates defined prior to MBE growth of closely-coupled dual-channel HEMT layers. The highest mobility of the closely-coupled dual-channel HEMT layers observed so far is 9600 cmWs at room temperature