J. Le Coz, B. Pelloux-Prayer, B. Giraud, F. Giner, P. Flatresse
{"title":"DTMOS power switch in 28 nm UTBB FD-SOI technology","authors":"J. Le Coz, B. Pelloux-Prayer, B. Giraud, F. Giner, P. Flatresse","doi":"10.1109/S3S.2013.6716542","DOIUrl":null,"url":null,"abstract":"Ultra-Thin Body and Box (UTBB) Fully Depleted Silicon-On-Insulator (FD-SOI) Technology has become mainstream in the industry with the objective to serve a wide spectrum of mobile multimedia products [1]. Transistors (fig 1) are fabricated in a 7nm thin layer of silicon sitting (Tsi) over a 25nm buried oxide (Tbox). Thanks to its better electrostatic control [2]; UTBB FD-SOI technology brings a significant improvement in terms of performance and power saving, complemented by an excellent responsiveness to power management design techniques for energy efficiency optimization. However, looking for a steady increase in performance for a voltage supply value constantly lowered with the evolution of technologies, BULK or FD-SOI, involves a decrease in the threshold voltage (Vt) and leads to an increase of the stand-by leakage current, requiring the implementation of a leakage current reduction technique.","PeriodicalId":219932,"journal":{"name":"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/S3S.2013.6716542","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
Ultra-Thin Body and Box (UTBB) Fully Depleted Silicon-On-Insulator (FD-SOI) Technology has become mainstream in the industry with the objective to serve a wide spectrum of mobile multimedia products [1]. Transistors (fig 1) are fabricated in a 7nm thin layer of silicon sitting (Tsi) over a 25nm buried oxide (Tbox). Thanks to its better electrostatic control [2]; UTBB FD-SOI technology brings a significant improvement in terms of performance and power saving, complemented by an excellent responsiveness to power management design techniques for energy efficiency optimization. However, looking for a steady increase in performance for a voltage supply value constantly lowered with the evolution of technologies, BULK or FD-SOI, involves a decrease in the threshold voltage (Vt) and leads to an increase of the stand-by leakage current, requiring the implementation of a leakage current reduction technique.