Trade-off Characteristics of Hysteresis Comparator used in Noisy Systems

Abstract

The output from digital input buffer is not stable when input noise is present near the threshold voltage of inverter. Hysteresis comparator with two threshold voltages gives stable output with noisy input signal. This paper presents the trade-off characteristics between the hysteresis voltage and the power consumption of a hysteresis comparator. An optimal design point is proposed with a hysteresis voltage up to $\mathbf{\pm 180\ \mathrm{mV}}$ with a power consumption of $\mathbf{0.713\ \mu\ \mathrm{W}}$.