F. Murabayashi, M. Matsumoto, K. Hanzawa, T. Yamauchi, K. Sakurai, H. Yamada, S. Shimada, A. Miyazaki
{"title":"A programmable sensor signal conditioning LSI","authors":"F. Murabayashi, M. Matsumoto, K. Hanzawa, T. Yamauchi, K. Sakurai, H. Yamada, S. Shimada, A. Miyazaki","doi":"10.1109/APASIC.2000.896920","DOIUrl":null,"url":null,"abstract":"A programmable sensor signal conditioning LSI has a programmable interface circuit to input various signals and has a wide signal range from 10 mV to 2 V. The LSI can calibrate errors of various sensors transfer within 0.5% accuracy in a wide signal range. The signal conditioning LSI has three main modules, that is a sigma-delta AD-converter, a high reliability EPROM, and a 16 bit signal conditioning DSP. The sigma-delta AD-converter has a programmable interface and 10 /spl mu/V minimum resolution. Information determining the input signal range and calibration data are stored in a high reliability EPROM which has a redundant cell architecture. These modules have been integrated in a 0.8 /spl mu/m CMOS process and the chip is 4.3 mm/spl times/4.7 mm.","PeriodicalId":313978,"journal":{"name":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","volume":"450 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2000.896920","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
A programmable sensor signal conditioning LSI has a programmable interface circuit to input various signals and has a wide signal range from 10 mV to 2 V. The LSI can calibrate errors of various sensors transfer within 0.5% accuracy in a wide signal range. The signal conditioning LSI has three main modules, that is a sigma-delta AD-converter, a high reliability EPROM, and a 16 bit signal conditioning DSP. The sigma-delta AD-converter has a programmable interface and 10 /spl mu/V minimum resolution. Information determining the input signal range and calibration data are stored in a high reliability EPROM which has a redundant cell architecture. These modules have been integrated in a 0.8 /spl mu/m CMOS process and the chip is 4.3 mm/spl times/4.7 mm.
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