Tunnel FETs for low power electronics

Abstract

We report on Tunnel Field-Effect Transistors for low power electronics. Thanks to their potential to reach sub-60mV/dec subthreshold slope, these devices are very attractive for use in circuits with sub-0.5V supply voltage. However, proper device design as well as material choice is not obvious and many implementations have shown larger slope than expected, due to parasitic trap-assisted tunneling conduction. We review work done at imec on tunnelFETs. Initial work was based on vertical nanowire structures using goup-IV semiconductor materials. More recently, implementation of TunnelFETS on III-V materials using a Zn-diffusion approach for source doping was demonstrated with an attractive slope below 60mV/dec. Trap-assisted tunneling is extracted from the devices characteristics based on the activation energy of different conduction mechanisms present in the devices.