{"title":"Performance assessment of a graphene-based ballistic switch design","authors":"Shamik Das, Nicolas S. Arango","doi":"10.23919/SNW.2017.8242304","DOIUrl":null,"url":null,"abstract":"This paper presents models, designs, and simulation results for logic circuits based upon graphene ballistic deflection transistors (GBDTs). The use of graphene in conventional semiconductor circuits has proved difficult due to its negligible bandgap. GBDTs might avoid this deficiency by electrostatically steering currents through graphene's highly conductive two-dimensional charge transport medium. Simulation results are presented for a GBDT-based inverter and full adder that are predicted to operate twice as fast as conventional CMOS circuits, at the cost of much lower transistor density. The GBDT-based circuits presented in this paper would be well suited for high-speed, high-duty-cycle applications, including high-throughput networking and high-performance computing.","PeriodicalId":424135,"journal":{"name":"2017 Silicon Nanoelectronics Workshop (SNW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Silicon Nanoelectronics Workshop (SNW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/SNW.2017.8242304","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents models, designs, and simulation results for logic circuits based upon graphene ballistic deflection transistors (GBDTs). The use of graphene in conventional semiconductor circuits has proved difficult due to its negligible bandgap. GBDTs might avoid this deficiency by electrostatically steering currents through graphene's highly conductive two-dimensional charge transport medium. Simulation results are presented for a GBDT-based inverter and full adder that are predicted to operate twice as fast as conventional CMOS circuits, at the cost of much lower transistor density. The GBDT-based circuits presented in this paper would be well suited for high-speed, high-duty-cycle applications, including high-throughput networking and high-performance computing.