{"title":"A compact recording array for neural interfaces","authors":"Lieuwe B. Leene, Yan Liu, T. Constandinou","doi":"10.1109/BioCAS.2013.6679648","DOIUrl":null,"url":null,"abstract":"This paper presents a 44-channel front-end neural interface for recording both Extracellular Action Potentials (EAPs) and Local Field Potentials (LFPs) with 60 dB dynamic range. With a silicon footprint of only 0.015 mm2 per recording channel this allows an unprecedented order of magnitude area reduction over state-of-the-art implementations in 0.18 μm CMOS. This highly compact configuration is achievable by introducing an in-channel Sigma Delta assisted Successive Approximation Register (ΣΔ-SAR) hybrid data converter integrated into the analogue front-end. A pipelined low complexity FIR filter is distributed across 44-channels to resolve a 10-bit PCM output. The proposed system achieves an input referred noise of 6.41 μVrms with a 6 kHz bandwidth and sampled at 12.5 kS/s, with a power consumption of 2.6 μW per channel.","PeriodicalId":344317,"journal":{"name":"2013 IEEE Biomedical Circuits and Systems Conference (BioCAS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Biomedical Circuits and Systems Conference (BioCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BioCAS.2013.6679648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents a 44-channel front-end neural interface for recording both Extracellular Action Potentials (EAPs) and Local Field Potentials (LFPs) with 60 dB dynamic range. With a silicon footprint of only 0.015 mm2 per recording channel this allows an unprecedented order of magnitude area reduction over state-of-the-art implementations in 0.18 μm CMOS. This highly compact configuration is achievable by introducing an in-channel Sigma Delta assisted Successive Approximation Register (ΣΔ-SAR) hybrid data converter integrated into the analogue front-end. A pipelined low complexity FIR filter is distributed across 44-channels to resolve a 10-bit PCM output. The proposed system achieves an input referred noise of 6.41 μVrms with a 6 kHz bandwidth and sampled at 12.5 kS/s, with a power consumption of 2.6 μW per channel.