{"title":"Control path oriented verification of sequential generic circuits with control and data path","authors":"K. Schneider, T. Kropf, Ramayya Kumar","doi":"10.1109/EDTC.1994.326809","DOIUrl":null,"url":null,"abstract":"Usually, digital circuits are split up into control and data path as there are specific synthesis methods for controllers and operation units. However, all known approaches to hardware verification which make use of this fact, model the operation unit also as a finite-state machine. This leads to enormous space requirements which limit the applicability of these approaches. In order to avoid this, abstraction mechanisms can be used to map Boolean tuples onto more complex data types. However, approaches to the verification of generic n-bit circuits have considered so far only circuits with simple controllers, such that the verification of only combinational circuits or special cases of sequential circuits is possible. In this paper, we present a new approach to hardware verification which allows the verification of generic circuits with non-trivial controllers.<<ETX>>","PeriodicalId":244297,"journal":{"name":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1994.326809","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
Usually, digital circuits are split up into control and data path as there are specific synthesis methods for controllers and operation units. However, all known approaches to hardware verification which make use of this fact, model the operation unit also as a finite-state machine. This leads to enormous space requirements which limit the applicability of these approaches. In order to avoid this, abstraction mechanisms can be used to map Boolean tuples onto more complex data types. However, approaches to the verification of generic n-bit circuits have considered so far only circuits with simple controllers, such that the verification of only combinational circuits or special cases of sequential circuits is possible. In this paper, we present a new approach to hardware verification which allows the verification of generic circuits with non-trivial controllers.<>