Impact of reducing RTA temperature on sub-10nm ultra-thin body SOI

Jong-Heon Yang, Jihun Oh, W. Cho, C. Ahn, K. Im, I. Baek, J. Park, Seongjae Lee
{"title":"Impact of reducing RTA temperature on sub-10nm ultra-thin body SOI","authors":"Jong-Heon Yang, Jihun Oh, W. Cho, C. Ahn, K. Im, I. Baek, J. Park, Seongjae Lee","doi":"10.1109/DRC.2004.1367765","DOIUrl":null,"url":null,"abstract":"In this work, we fabricated sub-10 nm UTB SOI and investigated its properties by using plasma doping (PLAD) and rapid thermal annealing (RTA). It is shown, for the first time, that electrical properties and device scalability of the sub-10 nm thin body were improved with reduced RTA temperature. In scaling down, SOI thickness decreases, but also RTA temperature scaling should be considered. RTA temperature is directly connected to the suppression of the short-channel effect and also it gives more chance for device scalability, especially for sub-20 nm SOI devices.","PeriodicalId":385948,"journal":{"name":"Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC.","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2004.1367765","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

In this work, we fabricated sub-10 nm UTB SOI and investigated its properties by using plasma doping (PLAD) and rapid thermal annealing (RTA). It is shown, for the first time, that electrical properties and device scalability of the sub-10 nm thin body were improved with reduced RTA temperature. In scaling down, SOI thickness decreases, but also RTA temperature scaling should be considered. RTA temperature is directly connected to the suppression of the short-channel effect and also it gives more chance for device scalability, especially for sub-20 nm SOI devices.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
降低RTA温度对亚10nm超薄机身SOI的影响
本文采用等离子体掺杂(PLAD)和快速热退火(RTA)技术制备了亚10nm UTB SOI,并对其性能进行了研究。研究首次表明,随着RTA温度的降低,亚10nm薄体的电学性能和器件可扩展性得到改善。当缩尺减小时,SOI厚度减小,但也要考虑RTA温度的缩尺。RTA温度直接关系到短通道效应的抑制,也为器件的可扩展性提供了更多的机会,特别是对于sub- 20nm的SOI器件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Complex band structure-based non-equilibrium Green's function (NEGF) transport studies for ultra-scaled carbon nanotube (CNT) transistors [CNTFETs] Nano-scale MOSFETs with programmable virtual source/drain High power AlGaN/GaN heterojunction FETs for base station applications Physical limits on binary logic switch scaling Directly lithographic top contacts for pentacene organic thin-film transistors
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1