A timestamping method using reduced cost ADC hardware

Abstract

For many semiconductor devices, time stability and relative time location of electrical events is critical; clocks need to strobe data when the data is valid. This fundamental performance is indicative of both the general quality of manufacture and the suitability of a particular device. Parametric measures might include duty cycle variation, peak-to-peak jitter, RMS jitter and minimum pulse width. As increasingly complex timing generation circuits are implemented with mixed analog and digital technology, more sophisticated testing requires a time sense between events (e.g. cycle-to-cycle jitter, period jitter and deterministic jitter.)