Test Synthesis for Logical X-functions

Abstract

A class of logical X-functions (xor, not-xor) and their qubit models is introduced, that are technologically feasible for test, diagnosis, and fault simulation of SoC components. Qubit models and methods for modeling and simulation of digital devices and components are proposed. Parallel methods for logic function minimization, SoC fault diagnosis, and coverage problem solving via unitary coding of qubit data structures are offered. The architecture of services for design, test and verification of digital devices based on qubit models of logical primitives is described. A service for fault-free circuits simulation based on the qubit coverage of functional primitives is given. The models, cubit data structures and methods are focused and simulated on the classical computers by leveraging unitary coding binary states.