Realization of a hardware generator for the sum of absolute difference component

Abstract

It is a known fact that an arithmetic function implemented in hardware has a higher throughput and calculation frequency than the one implemented in software, thus making the usage of hardware components imminent in applications where speed plays a crucial role. Sum of absolute difference (SAD) is an arithmetic operation most frequently used in motion estimation algorithms and video coding consequently. This operation can become very slow when applied on large inputs due to it's complexity and the series of additions it consists of. Electronic design automation tools can alleviate the burden of the design teams when creating new prototype hardware components. In this paper, we present an EDA tool which is able to generate the SAD component for arbitrary number of inputs.