{"title":"Proven single pass design methodology for high reliable VDSM","authors":"Keun-Ok Seo, Sancho Park","doi":"10.1109/APASIC.2000.896959","DOIUrl":null,"url":null,"abstract":"This paper addresses the Avant! silicon proven single pass design methodology for the recent very deep submicron (VDSM) era. Avant!'s single pass process is a predictable and controllable design process with closure in mind, not only for timing but also for signal/power integrity. By applying the right technology to the root cause of a design problem, this process can generate an optimal result in the shortest time.","PeriodicalId":313978,"journal":{"name":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2000.896959","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper addresses the Avant! silicon proven single pass design methodology for the recent very deep submicron (VDSM) era. Avant!'s single pass process is a predictable and controllable design process with closure in mind, not only for timing but also for signal/power integrity. By applying the right technology to the root cause of a design problem, this process can generate an optimal result in the shortest time.
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