Hyunki Han, Min-Woo Ko, Jeong-Hyun Cho, Gyeong-Gu Kang, Seok-Tae Koh, H. Bae, Hyunsik Kim
{"title":"A Monolithic 48V-to-1V 10A Quadruple Step-Down DC-DC Converter with Hysteretic Copied On-Time 4-Phase Control and 2× Slew Rate All-Hysteretic Mode","authors":"Hyunki Han, Min-Woo Ko, Jeong-Hyun Cho, Gyeong-Gu Kang, Seok-Tae Koh, H. Bae, Hyunsik Kim","doi":"10.1109/vlsitechnologyandcir46769.2022.9830233","DOIUrl":null,"url":null,"abstract":"This paper presents a 48V-to-1V quadruple step-down (QSD) DC-DC converter. The QSD comprising 4 parallel-inductors and 3 series-capacitors can efficiently supply up to 10A with fully monolithic 12V LDMOS by lowering the switching voltage to be quartered. The hysteretic copied on-time (HCOT) control allows clockless synchronization of 4-phase QSD without collapsing series-capacitor voltages. The 2-phase all-hysteretic (2× slew rate) mode is also presented for voltage droop mitigation under extreme load fluctuations. The chip fabricated in 0.18-μm BCD shows a peak efficiency of 88.5% and achieves ∆80mV sag and 1μs 2%-recovery time for a 6.3A/50ns load transition.","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830233","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper presents a 48V-to-1V quadruple step-down (QSD) DC-DC converter. The QSD comprising 4 parallel-inductors and 3 series-capacitors can efficiently supply up to 10A with fully monolithic 12V LDMOS by lowering the switching voltage to be quartered. The hysteretic copied on-time (HCOT) control allows clockless synchronization of 4-phase QSD without collapsing series-capacitor voltages. The 2-phase all-hysteretic (2× slew rate) mode is also presented for voltage droop mitigation under extreme load fluctuations. The chip fabricated in 0.18-μm BCD shows a peak efficiency of 88.5% and achieves ∆80mV sag and 1μs 2%-recovery time for a 6.3A/50ns load transition.
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