Experience in designing a large-scale multiprocessor using field-programmable devices and advanced CAD tools

S. Brown, N. Manjikian, Z. Vranesic, S. Caranci, A. Grbic, R. Grindley, M. Gusat, K. Loveless, Z. Zilic, S. Srbljic
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引用次数: 17

Abstract

This paper provides a case study that shows how a demanding application stresses the capabilities of today's CAD tools, especially in the integration of products from multiple vendors. We relate our experiences in the design of a large, high-speed multiprocessor computer using state of the art CAD tools. All logic circuitry is targeted field-programmable devices (FPDs). This choice amplifies the difficulties associated with achieving a highspeed design, and places extra requirements on the CAD tools. Two main CAD systems are discussed in the paper: Cadence Logic Workbench (LWB) is employed for board-level design, and Altera MAX+plusII is used for implementation of logic circuits in FPDs. Each of these products is of great value for our project, bur the integration of the two is less than satisfactory. The paper describes a custom procedure that we developed for integrating sub-designs realized in FPDs (via MAX+plusII) into our board-level designs in LWB. We also discuss experiences with Logic Modelling Smart Models, for simulation of FPDs and other types of chips.
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有使用现场可编程设备和先进CAD工具设计大型多处理器的经验
本文提供了一个案例研究,展示了一个要求苛刻的应用程序如何强调当今CAD工具的功能,特别是在集成来自多个供应商的产品方面。我们在使用最先进的CAD工具设计大型高速多处理器计算机方面的经验。所有的逻辑电路都是针对现场可编程器件(FPDs)的。这种选择加大了实现高速设计的难度,并对CAD工具提出了额外的要求。本文讨论了两种主要的CAD系统:Cadence Logic Workbench (LWB)用于板级设计,Altera MAX+plusII用于fpga中逻辑电路的实现。这些产品对我们的项目都有很大的价值,但是两者的整合并不令人满意。本文描述了我们开发的一个定制程序,用于将fpd中实现的子设计(通过MAX+plusII)集成到LWB中的板级设计中。我们还讨论了逻辑建模智能模型的经验,用于fpga和其他类型芯片的仿真。
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