{"title":"Using articulation nodes to improve the efficiency of finite-element based resistance extraction","authors":"A. Vangenderen, N.P. vanderMeiis","doi":"10.1109/DAC.1996.545674","DOIUrl":null,"url":null,"abstract":"In this paper, we describe how we have improved the efficiency of a finite-element method for interconnect resistance extraction by introducing articulation nodes in the finite element mesh. The articulation nodes are found by detecting equipotential regions and lines in the interconnects. Without generating inaccuracies, these articulation nodes split the finite-element mesh into small pieces that can be solved independently. The method has been implemented in the layout-to-circuit extractor Space. All interconnect resistances of a circuit containing 63,000 transistors are extracted on an HP 9000/735 workstation in approximately 70 minutes.","PeriodicalId":152966,"journal":{"name":"33rd Design Automation Conference Proceedings, 1996","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"33rd Design Automation Conference Proceedings, 1996","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1996.545674","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this paper, we describe how we have improved the efficiency of a finite-element method for interconnect resistance extraction by introducing articulation nodes in the finite element mesh. The articulation nodes are found by detecting equipotential regions and lines in the interconnects. Without generating inaccuracies, these articulation nodes split the finite-element mesh into small pieces that can be solved independently. The method has been implemented in the layout-to-circuit extractor Space. All interconnect resistances of a circuit containing 63,000 transistors are extracted on an HP 9000/735 workstation in approximately 70 minutes.
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