Online and Operand-Aware Detection of Failures Utilizing False Alarm Vectors

Abstract

This work presents a framework which detects online and at operand level of granularity all the vectors which excite a set of diagnosed failures in combinational modules. The failures may be of various types and may change over time. We propose to utilize this ability to detect failures at operand level of granularity to improve yield, by not discarding those chips containing failing and redundant computational units as long as they are not failing at the same time. The main challenge in realization of such a framework is the ability for on-chip storage of all the (test) vectors which excite the set of diagnosed failures. A major contribution of this work is to significantly minimize the number of stored test cubes by inserting only a few but carefully-selected "false alarm" vectors. As a result, a computational unit may be mis-diagnosed as failing for a given operand however we show such cases are rare and the chip may continue to be used.