A low-power interface circuit for piezoresistive transducers

A. Donida, D. Barrettino
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引用次数: 2

Abstract

This paper presents the design and development of a low-power interface circuit for piezoresistive transducers. This circuit combines the chopping technique with the correlated double sampling (CDS) technique in order to eliminate both the amplifier offset and the chopper ripple at the sampling frequency. In addition, programmable current sources compensate for the transducer offset and the low frequency components coming from environmental conditions thus allowing the readout of very weak input signals with high resolution (0.45μV) at a total power consumption of 200 μW.
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压阻式换能器的低功耗接口电路
本文介绍了一种用于压阻式换能器的低功耗接口电路的设计与研制。该电路将斩波技术与相关双采样(CDS)技术相结合,以消除采样频率处的放大器偏置和斩波纹波。此外,可编程电流源补偿传感器偏移和来自环境条件的低频分量,从而允许在200 μW的总功耗下以高分辨率(0.45μV)读出非常弱的输入信号。
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