G. D. Colletta, Odilon O. Dutra, L. H. C. Ferreira, T. Pimenta
{"title":"An ultra-low-power first-order asynchronous sigma-delta modulator for biomedical applications","authors":"G. D. Colletta, Odilon O. Dutra, L. H. C. Ferreira, T. Pimenta","doi":"10.1109/S3S.2013.6716564","DOIUrl":null,"url":null,"abstract":"In this paper an ultra-low-power first-order asynchronous sigma-delta modulator (ASDM) for biomedical applications in weak inversion is presented. It combines a Gm-C integrator as a linear filter in addition to a kind of zero biasing continuous time comparator with hysteresis as a non-linear element. The proposed ASDM was successfully simulated in an 130-nm IBM CMOS process. The simulations show a SINAD of 43.48 dB in a frequency bandwidth of 250 Hz for a modulation depth of 70 % with only 500 mV of power supply voltage and just 7.5 nW of power consumption. The typical figure of merit used to evaluate ADC circuits predicts an energy of 0.11 pJ per conversion step, which is suitable for implantable/wearable biomedical applications.","PeriodicalId":219932,"journal":{"name":"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/S3S.2013.6716564","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper an ultra-low-power first-order asynchronous sigma-delta modulator (ASDM) for biomedical applications in weak inversion is presented. It combines a Gm-C integrator as a linear filter in addition to a kind of zero biasing continuous time comparator with hysteresis as a non-linear element. The proposed ASDM was successfully simulated in an 130-nm IBM CMOS process. The simulations show a SINAD of 43.48 dB in a frequency bandwidth of 250 Hz for a modulation depth of 70 % with only 500 mV of power supply voltage and just 7.5 nW of power consumption. The typical figure of merit used to evaluate ADC circuits predicts an energy of 0.11 pJ per conversion step, which is suitable for implantable/wearable biomedical applications.