An Efficient ASIC Implementation of Public Key Cryptography Algorithm SM2 Based on Module Arithmetic Logic Unit

Abstract

SM2 public key cryptography, proposed by China, is widely used to ensure the security in communication. In this paper, based on the module arithmetic logic unit, SM3 unit, verify unit and XOR unit, we implemented a dual-field processor over SM2 public key cryptography, which can complete digital signature, verification, information encryption and decryption. In addition, the SM2 processor is described by Verilog HDL, and synthesized in CMOS 55nm process. Experimental results show that the SM2 processor runs at high frequency of 476 MHz with area of 245K gates. What's more, the processor requires only 0.56ms to compute a 256-bit point multiplication in GF(p), and 0.59ms in GF(2m).