Stuctured ASIC tutorial: essential information on devices and design flow (industrial tutorial)

Abstract

ISSP (Instant Solution Silicon Platform), the leading Structured ASIC Technology, was of great interest when introduced by NEC Electronics at DATE 2003. Now this tutorial will give you all the essential information required to judge the competitive advantage that using Structured ASIC can give you in your next project. ISSP devices are mask-programmed to your specification with very low NRE costs and short lead time. The Design is implemented through the optimised and dedicated synthesis technology of Synplicity's Synplify ASIC tool. This tutorial shows how you can use either your ASIC or FPGA expertise to use ISSP without excessive tool costs or massive retraining. Despite rumours of their demise, domino circuits are still indispensable in the design of high speed CMOS chips because they offer a 1.5-2x performance advantage over static logic. This tutorial briefly reviews basic dominio design issues, then compares and contrasts a wide variety of high-performance domino and nonmonotonic dynamic sequencing techniques. It then details the domino methodology used on the Itanium 2 microprocessors and explores pitfalls discovered during silicon debug. This tutorial is intended for circuit, logic, CAD, and test engineers interested in high-performance domino design.