Modeling of 3-dimensional defects in integrated circuits

Abstract

Although the majority of defects found in manufacturing lines have predominantly 2-Dimensional effects, there are many situations in which 2D defect models do not suffice, e.g. tall layer bulks disrupting the continuity of subsequent layers, abrupt surface topologies, extraneous materials embedded in the IC, etc. In this paper, a procedure to capture the catastrophic effect of 3-Dimensional defects is presented. This approach is based on the geometrical properties that result from the interaction between IC and defect size in two coordinate spaces: x-y and z. The approach is a natural extension to the concept of critical areas, namely, the extraction of critical volumes. Through the course of this work hints to the origins of 3D defects will be given, conditions to capture critical volumes will be developed, and it will be shown that the net effect of 3D defects is accumulated from layer to layer.<>