{"title":"Design a test chip to find out mixed signal interference with broad range instrumentation amplifier","authors":"Neeraj Agarwal, Neeru Agarwal, Manisha Sharma","doi":"10.1109/ISNE.2016.7543366","DOIUrl":null,"url":null,"abstract":"In this Paper, issues related to substrate coupling in system on chip design are described and demonstrated including the physical phenomenon responsible for its creation, coupling transmission mechanism and media, parameter affecting coupling strengths and its impact on mixed signal integrated circuits. A test chip to find out various aspect of mixed signal interference is planned in 0.8pm N well P sub CMOS technology 5V double poly double metal process. Basic aim of chip is to find out magnitude of interference happening when analog and digital circuit is placed nearby on a common substrate. An instrumentation amplifier with high CMRR is also designed for noise sensing. MOSFET capacitors at the input of instrumentation amplifier are used for the picking of substrate interference.","PeriodicalId":127324,"journal":{"name":"2016 5th International Symposium on Next-Generation Electronics (ISNE)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 5th International Symposium on Next-Generation Electronics (ISNE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2016.7543366","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract
In this Paper, issues related to substrate coupling in system on chip design are described and demonstrated including the physical phenomenon responsible for its creation, coupling transmission mechanism and media, parameter affecting coupling strengths and its impact on mixed signal integrated circuits. A test chip to find out various aspect of mixed signal interference is planned in 0.8pm N well P sub CMOS technology 5V double poly double metal process. Basic aim of chip is to find out magnitude of interference happening when analog and digital circuit is placed nearby on a common substrate. An instrumentation amplifier with high CMRR is also designed for noise sensing. MOSFET capacitors at the input of instrumentation amplifier are used for the picking of substrate interference.
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