{"title":"17x Reliability Enhanced LDPC Code with Burst-Error Masking and High-Precision LLR for Highly Reliable Solid-State-Drives with TLC NAND Flash Memory","authors":"Tsukasa Tokutomi, K. Takeuchi","doi":"10.1109/IMW.2016.7493561","DOIUrl":null,"url":null,"abstract":"Highly reliable LDPC ECC is introduced to improve the reliability of solid-state drives (SSDs). Although conventional AEP-LDPC ECC [3] is 12x highly reliable than BCH ECC, its error-correction capability is degraded due to the burst-errors and inaccurate log- likelihood ratio (LLR). To improve the reliability of TLC NAND flash, this paper proposes the burst-error masking (BEM) and program-disturb merged LLR estimation (PMLE). The first proposal, BEM eliminates the burst- errors by recording the error-location to the table. The second proposal, PMLE calculates the ratio of program-disturb errors to data-retention errors. As a result, more precise LLR is obtained. By combining BEM and PMLE, the SSD lifetime is extended by 17x and the table size overhead is reduced by 81%.","PeriodicalId":365759,"journal":{"name":"2016 IEEE 8th International Memory Workshop (IMW)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 8th International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2016.7493561","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Highly reliable LDPC ECC is introduced to improve the reliability of solid-state drives (SSDs). Although conventional AEP-LDPC ECC [3] is 12x highly reliable than BCH ECC, its error-correction capability is degraded due to the burst-errors and inaccurate log- likelihood ratio (LLR). To improve the reliability of TLC NAND flash, this paper proposes the burst-error masking (BEM) and program-disturb merged LLR estimation (PMLE). The first proposal, BEM eliminates the burst- errors by recording the error-location to the table. The second proposal, PMLE calculates the ratio of program-disturb errors to data-retention errors. As a result, more precise LLR is obtained. By combining BEM and PMLE, the SSD lifetime is extended by 17x and the table size overhead is reduced by 81%.
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