Analog digital converter using Josephson junctions

Abstract

four-bit sequential approximation analog-to-digital unit integrated on a 6.25 mm square chip. It operates in liquid helium at 4.2K. Timing signals are supplied by external equip ment situated at room temperature for the experiment. Figure 1 shows a schematic diagram of the experimental chip. The analog input, which is unipolar and amplitude limited to 8 mA, is applied to a superconducting loop. Across this loop is a Josephson junction switch and the circuit performs the sample-and-hold function. The gate is held in the voltage state by a dc bias for acquisition of signal current from the external input, which is connected across the gate. A sample command pulse to a control line on the gate cancels the bias to return the gate to the superconducting state, trapping the acquired signal as a circulating super current in the loop and holding it for the duration of the A/D conversion cycle. Design considerations for the sample and hold circuit included: use of a large enough inductance so that a large number of flux quanta were stored per least significant bit (LSB); shaping of the junction to give a threshold characteristic capable of resolving an LSB; large enough junction to accept the maximum change between conversion cycles; critical damping of the circuit; junction recovery to the superconducting state at the end of the acquisition period in the presence of the largest rate of change of input signal.