Dependency of threshold voltage on floating gate and inter-polysilicon dielectric thickness for nonvolatile memory devices

Abstract

This paper presents the dependency of threshold voltage (Vth) on the floating gate (FG) and nitride thickness in inter-polysilicon dielectric (IPD) layer for the nonvolatile memory devices (NVM). The 1.2 um n-type FG device with n+ polysilicon gate were simulated using SILVACO TCAD to measure the drain current versus control gate voltage (ID−VCG), where the FG and nitride thickness were varies from 0.1um to 0.35 um and 0.01um to 0.05um respectively. The analysis of programming and erase operation of NVM characteristics are presented, and floating gate charge can be obtained from transient simulation. It was concluded that ID−VCG curve shifts rightward to the positive higher Vth when FG and nitride thickness increase respectively. This is due to the electrical charging of FG in this state. The charge stored in the FG makes its potential higher.