Pub Date : 2010-07-27DOI: 10.3923/JAS.2010.1797.1801
M. Mohamad, F. Mustafa, M. Abidin, S. Rahman, N. K. Al-Obaidi, A. M. Hashim, A. Aziz, M. Hashim
The response of Pt-circular Schottky diodes fabricated on undoped AlGaN/GaN high-electron-mobility-transistor (HEMT) structure to hydrogen gas at various temperatures, ranging from 25°C to 200°C has been investigated. A 5 nm-thick of catalytic Pt Shottky contact is formed by electron beam evaporation. Both forward and reverse currents of the device increase upon exposing to hydrogen gas. Although a slight change of forward and reverse current is obtained at room temperature upon exposure to hydrogen but both currents drastically increase with the increase of temperatures. The time-transient characteristics show the average current increment and decrement speed of 27.6 nA/sec and 17.6 nA/sec, respectively at constant forward bias of 1V and temperature of 200°C.
{"title":"The sensing performance of hydrogen gas sensor utilizing undoped-AlGaN/GaN HEMT","authors":"M. Mohamad, F. Mustafa, M. Abidin, S. Rahman, N. K. Al-Obaidi, A. M. Hashim, A. Aziz, M. Hashim","doi":"10.3923/JAS.2010.1797.1801","DOIUrl":"https://doi.org/10.3923/JAS.2010.1797.1801","url":null,"abstract":"The response of Pt-circular Schottky diodes fabricated on undoped AlGaN/GaN high-electron-mobility-transistor (HEMT) structure to hydrogen gas at various temperatures, ranging from 25°C to 200°C has been investigated. A 5 nm-thick of catalytic Pt Shottky contact is formed by electron beam evaporation. Both forward and reverse currents of the device increase upon exposing to hydrogen gas. Although a slight change of forward and reverse current is obtained at room temperature upon exposure to hydrogen but both currents drastically increase with the increase of temperatures. The time-transient characteristics show the average current increment and decrement speed of 27.6 nA/sec and 17.6 nA/sec, respectively at constant forward bias of 1V and temperature of 200°C.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123817475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549412
Wang Xing-hua, Zhong Shun-an, Zhao Qi, Qu Ruoyuan
A low power design of CMOS bandgap reference of current mode used in analog-to-digital converter is proposed to obtain stable reference current and voltage. It realizes low power by one-order temperature compensation, resistance startup block, optimized internal operational amplifier and a new designed reference voltage buffer instead of closed loop. Under SMIC CMOS 0.35um 1P6M process and simulated by Spectre in Cadence, the circuit offers the current output of 50uA and the voltage output of 0.95V, 2V and 2.6v with a temperature coefficient of 50×10−6°−1 in the range of −40∼125°C. With the 3.3V supply, the power in test is lower than 0.2mW.
为了获得稳定的参考电流和电压，提出了一种用于模数转换器的低功耗CMOS电流模式带隙参考电路设计。它通过一阶温度补偿、电阻启动块、优化的内部运算放大器和新设计的参考电压缓冲器代替闭环来实现低功耗。该电路采用中芯国际CMOS 0.35um 1P6M工艺，并由Spectre in Cadence进行仿真，输出电流为50uA，输出电压为0.95V、2V和2.6v，温度系数为50×10−6°−1，范围为−40 ~ 125°C。在3.3V电源下，测试功率低于0.2mW。
{"title":"Low power current mode bandgap reference circuit with CMOS process","authors":"Wang Xing-hua, Zhong Shun-an, Zhao Qi, Qu Ruoyuan","doi":"10.1109/SMELEC.2010.5549412","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549412","url":null,"abstract":"A low power design of CMOS bandgap reference of current mode used in analog-to-digital converter is proposed to obtain stable reference current and voltage. It realizes low power by one-order temperature compensation, resistance startup block, optimized internal operational amplifier and a new designed reference voltage buffer instead of closed loop. Under SMIC CMOS 0.35um 1P6M process and simulated by Spectre in Cadence, the circuit offers the current output of 50uA and the voltage output of 0.95V, 2V and 2.6v with a temperature coefficient of 50×10−6°−1 in the range of −40∼125°C. With the 3.3V supply, the power in test is lower than 0.2mW.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124465493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549562
I. Yahya, V. Stolojan, S. Clowes, S. M. Mustaza, S. Silva
Three terminal measurements on a carbon nanotube field effect transistor (CNTFET) were carried out in high vacuum and the ambient, and its performance compared. The on-off current ratio, ION/IOFF, were 102 and 105 for devices operated in high vacuum and in ambient air, respectively. Here, we show that the conversion of p-type to ambipolar behavior may largely be attributed to the O2 in ambient doping the single walled carbon nanotubes (SWCNTs) in the active channel which consists of bundles of SWCNTs. Switching behaviour of these devices, with respect to constituent types of SWCNTs in the bundles will be discussed.
{"title":"Carbon nanotube field effect transistor measurements in vacuum","authors":"I. Yahya, V. Stolojan, S. Clowes, S. M. Mustaza, S. Silva","doi":"10.1109/SMELEC.2010.5549562","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549562","url":null,"abstract":"Three terminal measurements on a carbon nanotube field effect transistor (CNTFET) were carried out in high vacuum and the ambient, and its performance compared. The on-off current ratio, ION/IOFF, were 102 and 105 for devices operated in high vacuum and in ambient air, respectively. Here, we show that the conversion of p-type to ambipolar behavior may largely be attributed to the O2 in ambient doping the single walled carbon nanotubes (SWCNTs) in the active channel which consists of bundles of SWCNTs. Switching behaviour of these devices, with respect to constituent types of SWCNTs in the bundles will be discussed.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125345496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549472
Hui-Wen Cheng, Yiming Li
The work-function fluctuation (WKF) in 16-nm single- and triple-fin field effect transistors (FETs) with different aspect ratio (AR) of device geometry is for the first time explored. The influences of grain size of metal gate and AR on σIoff/ σIon are drawn; the device with high AR and large number of silicon fin can suppress the WKF. The triple-fin FinFET (AR = 2) is superior to triple-fin tri-gate (AR = 1) and quasi-planar (AR = 0.5) structures, where gate materials TiN and MoN are considered in n- and p-typed FETs. Compared with nFET, the WKF of pFET is larger than that of n-typed device due to the gate material having wider work-function variation. The 3D device simulation study on WKF-induced σIoff/ σIon benefits fabrication of nulti-fin devices.
首次研究了不同器件几何长宽比(AR)的16nm单翅和三翅场效应晶体管(fet)的功函数波动(WKF)。得出了金属栅极晶粒尺寸和AR对σIoff/ σIon的影响;采用高AR和大量硅片的器件可以抑制WKF。三鳍FinFET (AR = 2)优于三鳍三栅极(AR = 1)和准平面(AR = 0.5)结构，其中n型和p型fet中考虑栅极材料TiN和MoN。与nFET相比，由于栅极材料的功函数变化更大，因此pFET器件的WKF要大于n型器件。wkf诱导的σIoff/ σIon效应制备多翅片器件的三维器件仿真研究。
{"title":"Metal-gate work-function fluctuation in 16-nm single- and multi-fin field effect transistors with different aspect ratio","authors":"Hui-Wen Cheng, Yiming Li","doi":"10.1109/SMELEC.2010.5549472","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549472","url":null,"abstract":"The work-function fluctuation (WKF) in 16-nm single- and triple-fin field effect transistors (FETs) with different aspect ratio (AR) of device geometry is for the first time explored. The influences of grain size of metal gate and AR on σI<inf>off</inf>/ σI<inf>on</inf> are drawn; the device with high AR and large number of silicon fin can suppress the WKF. The triple-fin FinFET (AR = 2) is superior to triple-fin tri-gate (AR = 1) and quasi-planar (AR = 0.5) structures, where gate materials TiN and MoN are considered in n- and p-typed FETs. Compared with nFET, the WKF of pFET is larger than that of n-typed device due to the gate material having wider work-function variation. The 3D device simulation study on WKF-induced σI<inf>off</inf>/ σI<inf>on</inf> benefits fabrication of nulti-fin devices.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122904308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549374
A. Raaza, Alok V. Kanakeri, P. Krishna, S. Rajagopalan, A. Mehta
A novel method of producing multiple axial and tilted beams using eight feed double square loop (DSL) antenna is proposed. With varying permittivity value of dielectric substrate, the DSL antenna produces multiple beams and steer each of the beam produced at step of 45° throughout the 360° of space, thus offering wide range of option for any modern wireless device integrated with this antenna to focus the beam in target direction. Also the antenna operates in four different frequencies providing multi-channel operation in UWB region.
{"title":"Multiple beams scanning eight feed double square loop antenna for UWB communications","authors":"A. Raaza, Alok V. Kanakeri, P. Krishna, S. Rajagopalan, A. Mehta","doi":"10.1109/SMELEC.2010.5549374","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549374","url":null,"abstract":"A novel method of producing multiple axial and tilted beams using eight feed double square loop (DSL) antenna is proposed. With varying permittivity value of dielectric substrate, the DSL antenna produces multiple beams and steer each of the beam produced at step of 45° throughout the 360° of space, thus offering wide range of option for any modern wireless device integrated with this antenna to focus the beam in target direction. Also the antenna operates in four different frequencies providing multi-channel operation in UWB region.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122054172","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549548
S. S. Shariffudin, M. N. Masri, Abdul Aziz A, M. F. Malek, M. Rusop
The paper investigates the influence of different aluminum doping concentration on the photoresponse characteristics of doped ZnO thin films. Aluminum doped ZnO (AZO) thin films have been prepared by sol-gel dip-coating technique on glass substrates. 0.4M sol of AZO were prepared using monoethanolamine (MEA) as the stabilizer, zinc acetate dehydrate (Zn(CH3COO)2.2H2O) as the precursor, 2-methoxyethanol as solvent and aluminum nitrate nanohydrate (Al(NO3)3.9H2O) as dopant source. Samples with different weight percentage of the dopant were prepared to study the effect to electrical and optical properties of the thin films in dark and under illumination conditions. Electrical properties of thin films were characterized using 2-probe Current-Voltage (I-V) measurement system (Advantest R6243). The optical properties were studied using UV-Vis-NIR spectrometer. The electrical properties of the AZO thin films show higher conductivity under illumination compared to in dark condition. The optical properties show that the optical bandgap of the thin films increases with the increment of the doping concentrations.
{"title":"Photoresponse characteristics of aluminum doped zinc oxide thin film","authors":"S. S. Shariffudin, M. N. Masri, Abdul Aziz A, M. F. Malek, M. Rusop","doi":"10.1109/SMELEC.2010.5549548","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549548","url":null,"abstract":"The paper investigates the influence of different aluminum doping concentration on the photoresponse characteristics of doped ZnO thin films. Aluminum doped ZnO (AZO) thin films have been prepared by sol-gel dip-coating technique on glass substrates. 0.4M sol of AZO were prepared using monoethanolamine (MEA) as the stabilizer, zinc acetate dehydrate (Zn(CH3COO)2.2H2O) as the precursor, 2-methoxyethanol as solvent and aluminum nitrate nanohydrate (Al(NO3)3.9H2O) as dopant source. Samples with different weight percentage of the dopant were prepared to study the effect to electrical and optical properties of the thin films in dark and under illumination conditions. Electrical properties of thin films were characterized using 2-probe Current-Voltage (I-V) measurement system (Advantest R6243). The optical properties were studied using UV-Vis-NIR spectrometer. The electrical properties of the AZO thin films show higher conductivity under illumination compared to in dark condition. The optical properties show that the optical bandgap of the thin films increases with the increment of the doping concentrations.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121936107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549435
S. S. Shariffudin, M. Musa, M. H. Mamat, M. Rusop
ZnO thin films were deposited using thermal chemical vapor deposition (TCVD) using gold as the catalyst in a two furnaces system. Carbothermal technique is employed in this work where graphite was mixed into ZnO powder with 1:1 ratio as the precursor. Different thicknesses of gold were deposited on the substrate to study its effect to the properties of the thin films. The ZnO nanostructures were then characterized using field emission scanning electron microscopy (FE-SEM), photoluminescence (PL) measurement, and current-voltage (I-V) measurement. Influence of the catalyst thicknesses on the morphology, electrical properties and photoluminescence of ZnO nanostructures is discussed.
{"title":"Effect of Gold catalyst thickness on Zinc Oxide thin films","authors":"S. S. Shariffudin, M. Musa, M. H. Mamat, M. Rusop","doi":"10.1109/SMELEC.2010.5549435","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549435","url":null,"abstract":"ZnO thin films were deposited using thermal chemical vapor deposition (TCVD) using gold as the catalyst in a two furnaces system. Carbothermal technique is employed in this work where graphite was mixed into ZnO powder with 1:1 ratio as the precursor. Different thicknesses of gold were deposited on the substrate to study its effect to the properties of the thin films. The ZnO nanostructures were then characterized using field emission scanning electron microscopy (FE-SEM), photoluminescence (PL) measurement, and current-voltage (I-V) measurement. Influence of the catalyst thicknesses on the morphology, electrical properties and photoluminescence of ZnO nanostructures is discussed.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127991476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549507
S. D. Hutagalung, Kam C. Lew
Atomic force microscope (AFM) nanolithography was performed to create nanowire transistor pattern via local anodic oxidation process on surface of silicon-on-insulator (SOI) wafer. This nanoscale oxide pattern is used as a mask system for chemical etching to produce silicon nanowire transistor. The device with component structures of a silicon nanowire as channel with source, drain and gate pads had been drawn. The designed device was etched with TMAH to remove uncovered silicon layer and HF to remove oxide layer. From the AFM and FESEM observation found that the SiNWT with wire size of 92.65 nm in wire thickness, 90.83 nm wire width, and 10.30 µm in length and 175.17nm distance wire-gate with contact pads size of about 5 µm x 5µm has been successfully fabricated. The I-V characteristics indicated that the drain current was affected by the applied gate voltage similar to p-type FET.
{"title":"Electrical characteristics of silicon nanowire transistor fabricated by AFM lithography","authors":"S. D. Hutagalung, Kam C. Lew","doi":"10.1109/SMELEC.2010.5549507","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549507","url":null,"abstract":"Atomic force microscope (AFM) nanolithography was performed to create nanowire transistor pattern via local anodic oxidation process on surface of silicon-on-insulator (SOI) wafer. This nanoscale oxide pattern is used as a mask system for chemical etching to produce silicon nanowire transistor. The device with component structures of a silicon nanowire as channel with source, drain and gate pads had been drawn. The designed device was etched with TMAH to remove uncovered silicon layer and HF to remove oxide layer. From the AFM and FESEM observation found that the SiNWT with wire size of 92.65 nm in wire thickness, 90.83 nm wire width, and 10.30 µm in length and 175.17nm distance wire-gate with contact pads size of about 5 µm x 5µm has been successfully fabricated. The I-V characteristics indicated that the drain current was affected by the applied gate voltage similar to p-type FET.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130147434","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549387
M.A. Eshtawie, S. Hussin, M. Othman
Integer addition is one of the most important operations in digital computers digital signal processing and. In fact the speed of adders affects the speed and performance of their processors. In digital signal processing, multiply and accumulate (MAC) unit plays an important role when designing digital filters. However, this role is doubled when multiplierless techniques such as distributed arithmetic (DA) are applied. In such techniques, the addition operation is the main scale when specifying some of the design parameters such as operation speed, design area, and the power consumed. This paper discusses the results obtained from the design analyzer for the proposed addition circuit together with the results obtained for the two most common adders i.e. the carry lookahead adder (CLA) and the ripple carry adder (RCA). The results obtained for the three different adders show that the proposed addition circuit has lowest area, lowest power consumption. On the other hand, the proposed adder has an operation speed higher than the RCA and a very close to the speed of the CLA. it is worth to mention here that the proposed design is based on the concept of applying a set of if-then rules. This set of rules calculates the out sum and carry in human-like way of processing.
{"title":"Analysis of results obtained with a new proposed low area low power high speed fixed point adder","authors":"M.A. Eshtawie, S. Hussin, M. Othman","doi":"10.1109/SMELEC.2010.5549387","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549387","url":null,"abstract":"Integer addition is one of the most important operations in digital computers digital signal processing and. In fact the speed of adders affects the speed and performance of their processors. In digital signal processing, multiply and accumulate (MAC) unit plays an important role when designing digital filters. However, this role is doubled when multiplierless techniques such as distributed arithmetic (DA) are applied. In such techniques, the addition operation is the main scale when specifying some of the design parameters such as operation speed, design area, and the power consumed. This paper discusses the results obtained from the design analyzer for the proposed addition circuit together with the results obtained for the two most common adders i.e. the carry lookahead adder (CLA) and the ripple carry adder (RCA). The results obtained for the three different adders show that the proposed addition circuit has lowest area, lowest power consumption. On the other hand, the proposed adder has an operation speed higher than the RCA and a very close to the speed of the CLA. it is worth to mention here that the proposed design is based on the concept of applying a set of if-then rules. This set of rules calculates the out sum and carry in human-like way of processing.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131470351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549429
Noorfozila Bahari, A. M. Zain, A. Abdullah, D. Sheng, M. Othman
The pH-sensing properties of tantalum pentoxide (Ta2O5) film deposited by RF magnetron reactive sputtering method is demonstrated. The tantalum pentoxide film on silicon wafer samples were characterized by capacitance-voltage (C-V) measurements. The samples were annealed in ambient condition at 400°C for several hours. High frequency C-V measurements were performed on the wafer samples at pH levels of 4, 7 and 10. Results obtained from the C-V measurements showed good linearity in the selected pH range. The pH sensitivity has reached 62mV/pH, which is better than the theoretical Nernst potential.
{"title":"Study on pH sensing properties of RF magnetron sputtered tantalum pentoxide (Ta2O5) thin film","authors":"Noorfozila Bahari, A. M. Zain, A. Abdullah, D. Sheng, M. Othman","doi":"10.1109/SMELEC.2010.5549429","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549429","url":null,"abstract":"The pH-sensing properties of tantalum pentoxide (Ta2O5) film deposited by RF magnetron reactive sputtering method is demonstrated. The tantalum pentoxide film on silicon wafer samples were characterized by capacitance-voltage (C-V) measurements. The samples were annealed in ambient condition at 400°C for several hours. High frequency C-V measurements were performed on the wafer samples at pH levels of 4, 7 and 10. Results obtained from the C-V measurements showed good linearity in the selected pH range. The pH sensitivity has reached 62mV/pH, which is better than the theoretical Nernst potential.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131731475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：