Device degradation of n-channel poly-Si TFTs due to high-field, hot-carrier and radiation stressing

Abstract

There has been increasing interest in polysilicon thin film transistors (TFTs) for high-performance applications, particularly in high-resolution displays. For these applications, the primary requirement is that the TFTs have a low threshold voltage, low and stable leakage current and reasonably high carrier mobility. The poly-Si TFTs typically have sufficiently large mobilities to be used for high-drive and moderately high-frequency applications. However, since low temperatures are used in poly-Si TFT fabrication, both semiconducting and insulating layers are of poorer quality than those used in crystalline-Si technology. Consequently, long term TFT stability is an important issue. A considerable amount of research has focused on the stability of poly-Si TFTs. The instabilities are basically associated with hot carrier injection and degradation, negative gate bias instability and gate-induced carrier injection and trapping (Young, 1996). This leads to degradation of several device parameters such as threshold voltage, mobility, transconductance, and subthreshold slope. The work presented here is a comprehensive study of degradation in low temperature (/spl les/600/spl deg/C) poly-Si TFTs due to high-field, hot-carrier and ionizing radiation stressing. This unified approach makes it possible to identify the key reasons for degradation. Furthermore, a systematic study of the dependence on device geometry, as reported here, also helps understanding of the degradation mechanisms.