T. Nitta, Y. Yoshihisa, T. Kuroi, K. Hatasako, S. Maegawa, K. Onishi
{"title":"Enhanced active protection technique for substrate minority carrier injection in Smart Power IC","authors":"T. Nitta, Y. Yoshihisa, T. Kuroi, K. Hatasako, S. Maegawa, K. Onishi","doi":"10.1109/ISPSD.2012.6229059","DOIUrl":null,"url":null,"abstract":"In this paper, protection techniques against parasitic action due to minority carrier injection into substrate for Smart Power ICs have been presented. We investigated the protection efficiency of active type protection for various layout arrangements that are applicable to realistic IC, and found that the protection efficiency was strongly dependent on the layout. We propose the active type protection structure at collector side, which is effective at avoiding interferences from other components in realistic IC. We also found that separate type protection, which is one variation of the collector side protection, is more effective. The area penalty and the dependence of protection efficiency on temperature were also discussed.","PeriodicalId":371298,"journal":{"name":"2012 24th International Symposium on Power Semiconductor Devices and ICs","volume":"127 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 24th International Symposium on Power Semiconductor Devices and ICs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2012.6229059","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
In this paper, protection techniques against parasitic action due to minority carrier injection into substrate for Smart Power ICs have been presented. We investigated the protection efficiency of active type protection for various layout arrangements that are applicable to realistic IC, and found that the protection efficiency was strongly dependent on the layout. We propose the active type protection structure at collector side, which is effective at avoiding interferences from other components in realistic IC. We also found that separate type protection, which is one variation of the collector side protection, is more effective. The area penalty and the dependence of protection efficiency on temperature were also discussed.