NeuroSensor: A 3D image sensor with integrated neural accelerator

M. Amir, D. Kim, J. Kung, D. Lie, S. Yalamanchili, S. Mukhopadhyay
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引用次数: 12

Abstract

3D integration provides opportunities to design high-bandwidth and low-power CMOS image sensors (CIS) [1–4]. The 3D stacking of pixel tier, peripheral tier, memory tier(s), and compute tier(s) enables high degree of parallel processing. Also, each tier can be designed in different technology nodes (heterogeneous integration) to further improve power-efficiency. This paper presents a case study of a smart 3D image sensor with integrated neuro-inspired computing for intelligent vision processing. Hardware acceleration of neuro-inspired computing has received much attention in recent years for recognition and classification [5]. We present the physical design of NeuroSensor, a 3D CIS with an integrated convolutional neural network (CNN) accelerator. The rationale for our approach is that 3D integration of sensor, memory, and computing will effectively harness the inherent parallelism in neural algorithms. We design the NeuroSensor considering different complexities of CNN platform, ranging from only feature extraction to complete classification, and study the trade-offs between complexity, performance, and power.
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神经传感器:一种集成神经加速器的3D图像传感器
3D集成为设计高带宽和低功耗CMOS图像传感器(CIS)提供了机会[1-4]。像素层、外设层、存储层和计算层的3D堆叠使高度并行处理成为可能。此外,可以在不同的技术节点(异构集成)中设计每个层,以进一步提高功率效率。本文介绍了一种用于智能视觉处理的集成神经启发计算的智能三维图像传感器的案例研究。近年来,神经启发计算的硬件加速在识别和分类方面受到了广泛关注[5]。我们介绍了神经传感器的物理设计,这是一个集成卷积神经网络(CNN)加速器的3D CIS。我们方法的基本原理是传感器、内存和计算的3D集成将有效地利用神经算法中固有的并行性。我们设计了神经传感器,考虑了CNN平台的不同复杂性,从只提取特征到完成分类,并研究了复杂性、性能和功耗之间的权衡。
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