M. Nishitsuji, A. Tamura, T. Kunihisa, K. Yaharta, M. Shibuya, M. Kitagawa, T. Hirao
{"title":"Advanced GaAs-MMIC process technology using high-dielectric constant thin film capacitors by low-temperature RF sputtering method","authors":"M. Nishitsuji, A. Tamura, T. Kunihisa, K. Yaharta, M. Shibuya, M. Kitagawa, T. Hirao","doi":"10.1109/GAAS.1993.394441","DOIUrl":null,"url":null,"abstract":"The authors have developed a new GaAs-MMIC process technology using the low-temperature RF sputtered SrTiO/sub 3/ thin film capacitors which were combined with WSi-gate self-aligned FETs (SAFETs). The SrTiO/sub 3/ film with high dielectric constant (/spl epsi//sub r/) over 100 and low leakage current density under 10/sup -6/A/cm/sup 2/ at 1 MV/cm was obtained by RF sputtering method with the temperature range of 200/spl sim/300/spl deg/C. This SrTiO/sub 3/ capacitor exhibited no /spl epsi///sub r/ change up to 3.0 GHz, and low insertion losses of 0.29 dB and 0.05 dB were obtained for 32 pF-capacitor (S=10,000 /spl mu/m/sup 2/) at 0.2 GHz and 1.0 GHz, respectively. By integrating these on-chip SrTiO/sub 3/ bypass-capacitors into GaAs-IC, the parasitic inductance of the source-to-ground interconnection is successfully reduced, and the enhanced gain characteristic was obtained for self-biased amplifier circuit.<<ETX>>","PeriodicalId":347339,"journal":{"name":"15th Annual GaAs IC Symposium","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"15th Annual GaAs IC Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1993.394441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
The authors have developed a new GaAs-MMIC process technology using the low-temperature RF sputtered SrTiO/sub 3/ thin film capacitors which were combined with WSi-gate self-aligned FETs (SAFETs). The SrTiO/sub 3/ film with high dielectric constant (/spl epsi//sub r/) over 100 and low leakage current density under 10/sup -6/A/cm/sup 2/ at 1 MV/cm was obtained by RF sputtering method with the temperature range of 200/spl sim/300/spl deg/C. This SrTiO/sub 3/ capacitor exhibited no /spl epsi///sub r/ change up to 3.0 GHz, and low insertion losses of 0.29 dB and 0.05 dB were obtained for 32 pF-capacitor (S=10,000 /spl mu/m/sup 2/) at 0.2 GHz and 1.0 GHz, respectively. By integrating these on-chip SrTiO/sub 3/ bypass-capacitors into GaAs-IC, the parasitic inductance of the source-to-ground interconnection is successfully reduced, and the enhanced gain characteristic was obtained for self-biased amplifier circuit.<>