{"title":"A novel fully programmable switched-current IIR filter","authors":"M. Omair Ahmad, Shenghong Wang","doi":"10.1109/CICC.1997.606627","DOIUrl":null,"url":null,"abstract":"A fully programmable switched-current IIR filter using switched-current delay-multiplies units is described. The characteristics of the filter are fully programmable by simply changing the ratios of the coefficient transistors. To reduce the effect of non-ideal characteristics of MOS transistors, a high-performance differential switched-current memory cell is used as a basic building block. To reduce the chip area and maintain the required accuracy of the coefficients, an array consisting of three different sizes of transistors is designed instead of using a unit transistor array as coefficient transistors. A prototype second-order switched-current IIR filter array which consists of six second-order switched-current IIR filters has been fabricated with the standard 1.2 /spl mu/m CMOS process technology. Hard wiring technique is used for programming the filters. The test results show that the characteristics of the filters satisfy the design requirements.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"2012 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606627","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A fully programmable switched-current IIR filter using switched-current delay-multiplies units is described. The characteristics of the filter are fully programmable by simply changing the ratios of the coefficient transistors. To reduce the effect of non-ideal characteristics of MOS transistors, a high-performance differential switched-current memory cell is used as a basic building block. To reduce the chip area and maintain the required accuracy of the coefficients, an array consisting of three different sizes of transistors is designed instead of using a unit transistor array as coefficient transistors. A prototype second-order switched-current IIR filter array which consists of six second-order switched-current IIR filters has been fabricated with the standard 1.2 /spl mu/m CMOS process technology. Hard wiring technique is used for programming the filters. The test results show that the characteristics of the filters satisfy the design requirements.
介绍了一种采用开关电流延时倍增单元的全可编程开关电流IIR滤波器。滤波器的特性是完全可编程的,只需改变系数晶体管的比率。为了降低MOS晶体管非理想特性的影响,采用高性能的差分开关电流存储单元作为基本构件。为了减小芯片面积并保持所需的系数精度,设计了由三种不同尺寸的晶体管组成的阵列,而不是使用单元晶体管阵列作为系数晶体管。采用标准的1.2 /spl μ m CMOS工艺技术,制作了由6个二阶开关电流IIR滤波器组成的二阶开关电流IIR滤波器阵列原型。对滤波器的编程采用了硬接线技术。试验结果表明,滤波器的性能满足设计要求。