Consideration of mechanical chip crack on FBGA packages

Abstract

The laminate type FBGA package is one of the advanced solution of economic chip scale package, and has started to be used for applications that require low profiles and small areas, such as cellular phones or hand held products. IBM started to use "Mold and Saw" or "Matrix" type FBGA package, a technology to align plural numbers of semiconductor chips on a segment area of the laminate, wire bond, transfer mold, then finally singulate by a dicing saw. The ability to dice the package size independent to the molding chase or punching equipment is the largest benefit of this technology. During the development stage, IBM had observed a phenomenon that the chips were completely separated into two or more segments. Initially the root cause was suspected to be the CTE difference of the materials that generates mechanical warpage to the laminate, but simulational analysis showed no impact. To solve the phenomenon, we discovered the correlation of the laminate profile, solder mask thickness variations, and mechanical stresses on the chip surface. A 'bath tub" shaped solder mask profile at the center of chip placement area on the laminate may cause excessive pressure on the chip during transferring mold compound, and result in chip fractures. Experiments using several variations of laminate profiles were used, and confirmed the larger profile can generate chip cracks. This paper contains details of the phenomenon.