Improving per processor memory use of ns-3 to enable large scale simulations

Abstract

In this paper we describe enhancements to improve the scaling of the ns-3 simulator for large problem sizes. The ns-3 simulator has a parallel capability however the current implementation instantiates the entire network topology on all ranks (processors). This restricts the problem sizes that could be run. We describe an approach to removing this limitation by distributing the network topology across ranks such that each rank only holds a part of the network topology. Performance studies were conducted to investigate the scaling performance of the modified ns-3 simulator.