{"title":"Low-power IC design challenge","authors":"C. Mao","doi":"10.1109/VLSI-DAT.2015.7114563","DOIUrl":null,"url":null,"abstract":"Summary form only given. Green design becomes more important in these years. How to enhance the power efficiency is the mainstream of the SoC design. This work will talk about the challenges and possible solutions of each stage in the IC design flow, from the architecture level to the production level.","PeriodicalId":369130,"journal":{"name":"VLSI Design, Automation and Test(VLSI-DAT)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Design, Automation and Test(VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-DAT.2015.7114563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Summary form only given. Green design becomes more important in these years. How to enhance the power efficiency is the mainstream of the SoC design. This work will talk about the challenges and possible solutions of each stage in the IC design flow, from the architecture level to the production level.
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