Jaya Madan, Rupinder Kaur, Rajnish Sharma, R. Pandey, R. Chaujar
{"title":"Electrical Characteristics Assessment of Gate Metal and Source Pocket Engineered DG-TFET for Low Power Analog Applications","authors":"Jaya Madan, Rupinder Kaur, Rajnish Sharma, R. Pandey, R. Chaujar","doi":"10.1109/EDKCON.2018.8770462","DOIUrl":null,"url":null,"abstract":"Tunnel Field Effect Transistors (TFET)offers low leakage current and allows good scalability, however, they suffer from low ON-current. Here, in this work, the gate metal engineering scheme and n+ source pocket scheme has been integrated to overcome the major roadblocks of TFET. In this regard, 4 types of TFET architectures, namely the double gate TFET (DG-TFET), gate metal engineered DG-TFET (GME-DG-TFET), source pocket DG-TFET (SP-DG-TFET), and GME-SP-DG-TFET (which integrate the merits of GME and SP engineering)are investigated. The electrical characteristics and analog parameters in terms of surface potential, energy bands, band to band tunneling rate, electric field, drain current, current switching ratio, ambipolar current, threshold voltage, and subthreshold swing are assessed for all the devices. It is investigated that the combined merits of GME and SP consequently result in superior analog performance of DG-TFET. Remarkable improvement in terms of the ON-state drain current from an order of 1010 A to 1012A and decrease in Vth of 27.71% has been obtained for GME-SP-DG-TFET as compared to DG-TFET.","PeriodicalId":344143,"journal":{"name":"2018 IEEE Electron Devices Kolkata Conference (EDKCON)","volume":"168 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Electron Devices Kolkata Conference (EDKCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDKCON.2018.8770462","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Tunnel Field Effect Transistors (TFET)offers low leakage current and allows good scalability, however, they suffer from low ON-current. Here, in this work, the gate metal engineering scheme and n+ source pocket scheme has been integrated to overcome the major roadblocks of TFET. In this regard, 4 types of TFET architectures, namely the double gate TFET (DG-TFET), gate metal engineered DG-TFET (GME-DG-TFET), source pocket DG-TFET (SP-DG-TFET), and GME-SP-DG-TFET (which integrate the merits of GME and SP engineering)are investigated. The electrical characteristics and analog parameters in terms of surface potential, energy bands, band to band tunneling rate, electric field, drain current, current switching ratio, ambipolar current, threshold voltage, and subthreshold swing are assessed for all the devices. It is investigated that the combined merits of GME and SP consequently result in superior analog performance of DG-TFET. Remarkable improvement in terms of the ON-state drain current from an order of 1010 A to 1012A and decrease in Vth of 27.71% has been obtained for GME-SP-DG-TFET as compared to DG-TFET.