{"title":"Material Selection for Ion Trap Chip Working at Extreme Low Temperatures","authors":"L. Bu, Hongyu Li, Xiaowu Zhang","doi":"10.1109/EPTC.2018.8654422","DOIUrl":null,"url":null,"abstract":"A new architecture has been demonstrated for microfabricated ion traps, built around ceramic ball-grid array (BGA) connections. 56MHz RF frequency is applied to generate the electric field to trap the ions. The interposer is wirebonded to a Kyocera CPGA (Ceramic pin grid array) carrier for signal routing. As low temperature is favorable for ion trap chips, the material selection has to be done carefully in the present paper. Two kinds of materials, i.e., device passivation materials and die attach materials, are simulated and tested by the experiment. In the mechanical simulation, HD-4100 and HD8930 has lower mechanical stress. However, the short loop test reveals that almost all the bumps are detached from HD-4100 material and there are lots of unknown whiskers are founded after the samples are tested at 17K for 1 hour. Hence, SiO2 is still the first choice as passivation material in our process. For die attach materials, two kinds of material are evaluated in our experiment.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2018.8654422","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A new architecture has been demonstrated for microfabricated ion traps, built around ceramic ball-grid array (BGA) connections. 56MHz RF frequency is applied to generate the electric field to trap the ions. The interposer is wirebonded to a Kyocera CPGA (Ceramic pin grid array) carrier for signal routing. As low temperature is favorable for ion trap chips, the material selection has to be done carefully in the present paper. Two kinds of materials, i.e., device passivation materials and die attach materials, are simulated and tested by the experiment. In the mechanical simulation, HD-4100 and HD8930 has lower mechanical stress. However, the short loop test reveals that almost all the bumps are detached from HD-4100 material and there are lots of unknown whiskers are founded after the samples are tested at 17K for 1 hour. Hence, SiO2 is still the first choice as passivation material in our process. For die attach materials, two kinds of material are evaluated in our experiment.