Design and implementation of a low-power cryptosystem SoC

Abstract

In this paper, we design and implement a cryptosystem SoC (CSoC). We combine a virtual microprocessor and AMBA bus to elaborate an embedded system model that is capable of shortening the testing time of the global system and calculating the performance for various types of microprocessors. The virtual microprocessor instead of the physical one is used to control the entire system, so that the high level program could be applied to monitor the behavior of the system. The power management technology and Chaos key evolved module are integrated to improve our design. The CSoC is implemented using both a 0.18µm TSMC cell library and an FPGA Device.