{"title":"An 88%-Power-Efficiency Accuracy-Enhanced DC-DC Conversion System for Transcutaneous-Powered Cochlear Implants","authors":"Xiwen Zhang, Hoi Lee","doi":"10.1109/BIOCAS.2007.4463325","DOIUrl":null,"url":null,"abstract":"This paper presents a dc-dc conversion system consisting of a switched-capacitor voltage tripler and a low-dropout regulator (LDO) for transcutaneous-powered cochlear implants. Break-before-make mechanism is developed in the tripler to improve the power efficiency and reduces the output glitch. The current-buffer compensated LDO as a post-regulator of the tripler not only removes the glitch from the tripler, but also maintains a constant and stable output voltage irrespective of the change in different load currents. The accuracy of the output voltage is thus significantly enhanced. In a standard 0.35-mum CMOS, results show that the proposed system can deliver up to 60 mA load current and achieve the peak power efficiency of 88%. The maximum output voltage variation is only 0.6% of the nominal output of 4.84 V under full load current change of 60 mA.","PeriodicalId":273819,"journal":{"name":"2007 IEEE Biomedical Circuits and Systems Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Biomedical Circuits and Systems Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIOCAS.2007.4463325","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents a dc-dc conversion system consisting of a switched-capacitor voltage tripler and a low-dropout regulator (LDO) for transcutaneous-powered cochlear implants. Break-before-make mechanism is developed in the tripler to improve the power efficiency and reduces the output glitch. The current-buffer compensated LDO as a post-regulator of the tripler not only removes the glitch from the tripler, but also maintains a constant and stable output voltage irrespective of the change in different load currents. The accuracy of the output voltage is thus significantly enhanced. In a standard 0.35-mum CMOS, results show that the proposed system can deliver up to 60 mA load current and achieve the peak power efficiency of 88%. The maximum output voltage variation is only 0.6% of the nominal output of 4.84 V under full load current change of 60 mA.