{"title":"A Mixed-Signal Multi-Chip Neural Recording Interface with Bandwidth Reduction","authors":"B. Gosselin, A. E. Ayoub, M. Sawan","doi":"10.1109/BIOCAS.2007.4463306","DOIUrl":null,"url":null,"abstract":"We present the design of a multi-chip neural interface intended for multi-channel neural recording. The design features a mixed-signal part that handles neural signal conditioning, digitization and time-division multiplexing, and a digital part that provides control, bandwidth reduction, and serial communications towards a host interface. The two CMOS 0.18-mum fabricated embedded circuits that implement both parts are directly mounted on the back of a medical-grade stainless steel microelectrodes array and wire-bonded to its post-processed base. The presented neural interface integrates 16 channels for validation; however, the proposed approach is scalable to larger channel counts. In fact, it is suitable to implement microsystems including several hundreds of recording channels. The performance of the implemented multi-channel interface was validated with real neural waveforms.","PeriodicalId":273819,"journal":{"name":"2007 IEEE Biomedical Circuits and Systems Conference","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Biomedical Circuits and Systems Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIOCAS.2007.4463306","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
We present the design of a multi-chip neural interface intended for multi-channel neural recording. The design features a mixed-signal part that handles neural signal conditioning, digitization and time-division multiplexing, and a digital part that provides control, bandwidth reduction, and serial communications towards a host interface. The two CMOS 0.18-mum fabricated embedded circuits that implement both parts are directly mounted on the back of a medical-grade stainless steel microelectrodes array and wire-bonded to its post-processed base. The presented neural interface integrates 16 channels for validation; however, the proposed approach is scalable to larger channel counts. In fact, it is suitable to implement microsystems including several hundreds of recording channels. The performance of the implemented multi-channel interface was validated with real neural waveforms.