A Mixed-Signal Multi-Chip Neural Recording Interface with Bandwidth Reduction

B. Gosselin, A. E. Ayoub, M. Sawan
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引用次数: 16

Abstract

We present the design of a multi-chip neural interface intended for multi-channel neural recording. The design features a mixed-signal part that handles neural signal conditioning, digitization and time-division multiplexing, and a digital part that provides control, bandwidth reduction, and serial communications towards a host interface. The two CMOS 0.18-mum fabricated embedded circuits that implement both parts are directly mounted on the back of a medical-grade stainless steel microelectrodes array and wire-bonded to its post-processed base. The presented neural interface integrates 16 channels for validation; however, the proposed approach is scalable to larger channel counts. In fact, it is suitable to implement microsystems including several hundreds of recording channels. The performance of the implemented multi-channel interface was validated with real neural waveforms.
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一种带宽降低的混合信号多芯片神经记录接口
我们提出了一种用于多通道神经记录的多芯片神经接口的设计。该设计具有处理神经信号调理、数字化和时分多路复用的混合信号部分,以及提供控制、带宽减少和对主机接口的串行通信的数字部分。实现这两个部分的两个CMOS 0.18 mum制造嵌入式电路直接安装在医疗级不锈钢微电极阵列的背面,并通过导线粘合到其后处理底座上。该神经接口集成了16个通道进行验证;然而,所提出的方法可扩展到更大的信道计数。实际上,它适用于实现包含数百个记录通道的微系统。用真实神经网络波形验证了所实现的多通道接口的性能。
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