D. Márquez-Viloria, N. G. González, Cristian Alzate-Anzola
{"title":"A Framework for the Parallelization of Optical Communication Algorithms on SoC-FPGA Using HLS","authors":"D. Márquez-Viloria, N. G. González, Cristian Alzate-Anzola","doi":"10.1109/LATINCOM.2018.8613210","DOIUrl":null,"url":null,"abstract":"This work presents a framework for the parallelization of optical communication algorithms on Xilinx FPGAs. The proposed framework uses Matlab, Vivado HLS, and PetaLinux OS for the design, parallelization, implementation, and verification of the algorithms. This framework enables the tests for multiple variations of the architecture on the different FPGAs families, allowing to explore several parallelization directives, such as pipeline, unrolling, partitioning, and mixed techniques. This approach opens a novel alternative in the parallelization of the optical communication algorithms on FPGA including low-cost families.","PeriodicalId":332646,"journal":{"name":"2018 IEEE 10th Latin-American Conference on Communications (LATINCOM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 10th Latin-American Conference on Communications (LATINCOM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LATINCOM.2018.8613210","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This work presents a framework for the parallelization of optical communication algorithms on Xilinx FPGAs. The proposed framework uses Matlab, Vivado HLS, and PetaLinux OS for the design, parallelization, implementation, and verification of the algorithms. This framework enables the tests for multiple variations of the architecture on the different FPGAs families, allowing to explore several parallelization directives, such as pipeline, unrolling, partitioning, and mixed techniques. This approach opens a novel alternative in the parallelization of the optical communication algorithms on FPGA including low-cost families.