MoldFlow simulation study on void risk prediction for FCCSP with molded underfill technology

F. Yen, L. Hung, N. Kao, D. Jiang
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引用次数: 4

Abstract

The microelectronics products of Flip Chip-Chip Scale Package (FCCSP) with more increasing challenges are faced to assure molding capability with rapid advances in flip chip technology such as decreasing stand-off height and bump pitch, especially when Molded Underfill (MUF) is used during transfer molding process. There is one important challenge that faced severe air void entrapment under the die (air void concentrate among bumps region). Generally, the experiments involving a lot of DOE matrixes which spend a lot of time and materials (dummy die, substrate, mold compound...etc.) to solve this air void issue. As above reasons, the moldflow simulation can be used to apply molding parameters to find out optimum solutions for air void risk free of MUF FCCSP with different bump structure or substrate structure design, which can reduce development cycle time before mass production. In this paper, 3D moldflow simulation software which can apply transfer molding process parameters is used. There are two molding flow factors will be presented in this paper. One is MUF FCCSP with different stand-off height construction (control different bump height dimension) which performs significant difference molding melt-front position. And another is substrate solder mask with different pattern design (solder mask w/ all open or finger like pattern design) which molding compound through over on solder mask pattern (solder mask with open region as 10um depth structure) and performs different melt-front pattern. From this study, we can conclude some results for improvement molding performance of MUF FCCSP during transfer molding process. The MUF FCCSP with the 50um stand-off height structure performs low air void risk due to mold compound could easily flow under die region with more flow space. In addition, mold compound also performs well melt-front flow that the substrate solder mask with all open structure design can get more 10um flow space under die region. Finally, the simulation results are aligned with experiments and it can be used to predict void risk.
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模压下填技术FCCSP空洞风险预测的MoldFlow仿真研究
随着倒装芯片技术的快速发展,特别是在转移成型过程中使用模压下填料(MUF),倒装芯片芯片规模封装(FCCSP)微电子产品面临着越来越大的挑战,以确保成型能力。有一个重要的挑战,面临着严重的空气在模具下夹持(空气集中在凸起区域)。通常,实验涉及大量的DOE矩阵,花费大量的时间和材料(虚拟模具,衬底,模具复合材料等)来解决这个空隙问题。基于以上原因,模流仿真可以应用成型参数,找出MUF FCCSP在不同凸点结构或基板结构设计下无空隙风险的最佳解决方案,从而缩短量产前的开发周期。本文采用可应用传递成型工艺参数的三维模流仿真软件。本文将介绍两种成型流动因素。一种是MUF FCCSP,不同的凸点高度结构(控制不同的凸点高度尺寸)对成型熔前位置有显著影响。另一种是不同图案设计的基板阻焊片(全开放式或指状图案设计的阻焊片),其成型复合通过覆盖式阻焊片图案(开放区域为10um深度结构的阻焊片)并执行不同的熔前图案。通过研究,得出了提高MUF FCCSP在传递成型过程中成型性能的一些结论。具有50um高度结构的MUF FCCSP具有较低的空气空洞风险,因为模具化合物很容易在具有更多流动空间的模具区域下流动。此外,模具复合材料还具有良好的熔前流动性能,采用全开放式结构设计的基板阻焊片可在模区下获得10um以上的流动空间。仿真结果与实验结果吻合较好,可用于空洞风险的预测。
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