Novel Characterization Method of Chip Level Hybrid Bonding Strength

Juno Kim, K. Lim, S. Hahn, Mingu Lee, D. Rhee
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引用次数: 1

Abstract

A new characterization method for interfacial adhesion between die to die hybrid bonding interface at chip level is developed to evaluate and analyze the adhesion strength. Die to wafer or die to die hybrid bonding and stacking is very promising scheme for the next 2.5D and 3DIC Heterogeneous. However, there is no proven methodology or guideline to characterize the die level hybrid bonding strength which is very much dependent on the surface treatment process parameters, the physical and chemical characteristics of the bonding interfaces and particles and so on. To improve the quality and reliability of the die level hybrid bonding interface, it is crucial to identify well defined characterization methodology, especially for the thin die case which is no more applicable by using conventionally used die shear test method. In this paper, the authors developed novel characterization method of die level hybrid bonded interface strength by applying the single cantilever method using thin die with a thickness of $100\ \mu\mathrm{m}$. To optimize the test specimen design and testing condition, the finite element analysis (FEA) is performed. Using the optimized methodology, a series of experiments for characterizing the die to die bonding strength are conducted at various load-point lengths, bonding lengths and annealing temperatures. Based on the FEA and experimental data, the limitations and prospects of the developed characterization method are discussed in detail.
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芯片级杂化键合强度表征新方法
提出了一种新的芯片级混合键合界面粘接性能表征方法,用于评价和分析粘接强度。在未来的2.5D和3DIC异构化中,晶圆间或晶圆间的混合键合和堆叠是非常有前途的方案。然而,目前还没有成熟的方法或指南来表征模具级混合键合强度,这在很大程度上取决于表面处理工艺参数、键合界面和颗粒的物理和化学特性等。为了提高模具级混合键合界面的质量和可靠性,确定明确的表征方法至关重要,特别是对于薄模情况,传统的模具剪切试验方法已不再适用。本文采用厚度为$100\ \mu\mathrm{m}$的薄模具,采用单悬臂法开发了新的模具级杂化粘结界面强度表征方法。为了优化试件设计和试验条件,进行了有限元分析。利用优化的方法,在不同的载荷点长度、键合长度和退火温度下进行了一系列表征模具与模具结合强度的实验。基于有限元分析和实验数据,详细讨论了该表征方法的局限性和前景。
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Magnetically Actuated Test Method for Interfacial Fracture Reliability Assessment nSiP(System in Package) Platform for various module packaging applications IEEE 71st Electronic Components and Technology Conference [Title page] Evaluation of Low-k Integration Integrity Using Shear Testing on Sub-30 Micron Micro-Cu Pillars CoW Package Solution for Improving Thermal Characteristic of TSV-SiP for AI-Inference
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