{"title":"Passivity Enhancement for Three-Phase Grid-Connected Inverter in dq-frame","authors":"Yingxiang Peng, Kai Li, Jiancheng Zhao, Chuan Xie","doi":"10.1109/SPEC.2018.8635954","DOIUrl":null,"url":null,"abstract":"The non-passivity features of the grid-connected voltage-source inverter (VSI) may cause interaction resonance in the weak grid. Enhancing the passivity of VSI output admittance can reduce the risk of interaction resonance between VSI and power grid. With the increase of phase-locked loop (PLL) bandwidth, the passivity of VSI output admittance is worse. Besides, the dq-frame single current control is less robust than the $\\alpha \\beta $-frame current control against the effect of PLL bandwidth changes. This paper proposes a q-axis modulation voltage compensation strategy to enhance the passivity of q-axis admittance. With the proposed strategy, the VSI output admittance has non-negative real part within wide PLL bandwidth. The simulation and experiment results show the effectiveness of the proposed approach.","PeriodicalId":335893,"journal":{"name":"2018 IEEE 4th Southern Power Electronics Conference (SPEC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 4th Southern Power Electronics Conference (SPEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPEC.2018.8635954","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The non-passivity features of the grid-connected voltage-source inverter (VSI) may cause interaction resonance in the weak grid. Enhancing the passivity of VSI output admittance can reduce the risk of interaction resonance between VSI and power grid. With the increase of phase-locked loop (PLL) bandwidth, the passivity of VSI output admittance is worse. Besides, the dq-frame single current control is less robust than the $\alpha \beta $-frame current control against the effect of PLL bandwidth changes. This paper proposes a q-axis modulation voltage compensation strategy to enhance the passivity of q-axis admittance. With the proposed strategy, the VSI output admittance has non-negative real part within wide PLL bandwidth. The simulation and experiment results show the effectiveness of the proposed approach.