Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)

Abstract

We proposed a combined magnetic and circuit level technique to explore the design methodology of Spin-Torque Transfer RAM (SPRAM). A dynamic magnetic model of magnetic tunneling junction (MTJ), which is based upon measured spin torque induced magnetization switching behavior, is also proposed. The response of CMOS circuitry is characterized by SPICE and used as the input of our MTJ model to simulate the dynamic behavior of SPRAM cell. By using this technique, we explored the design margin of SPRAM cell with one-transistor-one-MTJ (ITU) structure. Simulation results show that our technique can significantly reduce the design pessimism, compared to conventional SRPAM cell model.